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[None][perf] Use +64 batch sizes for padding-enabled CUDA graphs#12895

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yijingl-nvidia:default_cuda_graph_batch_sizes
Apr 24, 2026
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[None][perf] Use +64 batch sizes for padding-enabled CUDA graphs#12895
taylor-yb-lee merged 2 commits into
NVIDIA:mainfrom
yijingl-nvidia:default_cuda_graph_batch_sizes

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@yijingl-nvidia yijingl-nvidia commented Apr 9, 2026

Description

When enable_padding=True, replace the sparse powers-of-2 schedule (256, 512, 1024, 2048) with uniform +64 increments after the initial [1,2,4,8,...,128] base, giving denser coverage (192, 256, 320, …, max_batch_size) and reducing padding waste at intermediate batch sizes.

To test how denser batch sizes improve output throughput, we’ve tested on four major models, DeepSeek R1 and V3.2, Kimi K2 and Qwen 3, and in both aggregate and disagg modes.

A denser set of batch sizes comes with the cost of more GPU memory. Each CUDA graph metadata takes about 10 MiB for DeepSeek R1. For +64 batch sizes, it increases from 220MiB to 490 MiB per GPU. For +8 batch sizes, it goes further to 2.6 GiB.

From the experiments, we found that denser batch sizes led to smaller drop on output throughput. Both +64 and +8 batch sizes improve the metrics. +64 batch sizes improve by up to 1.3x for agg and 1.5x for disagg for some large concurrencies.

+8 batch sizes improves a bit more than +64 on most models. However. We did notice a regression of +8 batch sizes on DeepSeek V3.2. We suspect DeepSeek V3.2 uses DSA which accelerates the attention computation but makes the CUDA graph more complex to store, thereby costing more than 2x GPU memory to save. This squeezes out available space for KV cache, reducing server capacity. Each GPU in the +8 experiment has 5 GiB fewer KV cache memory than the +64.

On the downside, +64 batch sizes increase server startup time. TRTLLM repeats the graph capture twice. 1st as a dry run to measure how much GPU memory is used at runtime to estimate how much KV cache we can safely allocate. 2nd as the actual startup with the full KV cache allocated. Tested on GB200, DeepSeek R1 TP=4, IFB, max batch size 2048, it increases CUDA graph capture time by 1.4x and total LLM init time (measured as the time of get_llm()) by 1.17x. Future remedy can be to reduce the number of CUDA graph captures in the dry run phase and use an estimate based on the memory usage of the remaining CUDA graphs captured.

We concluded by suggesting landing the change to use +64 batch sizes for the next release. We are also writing a blog post with the data and guidance on how to set CUDA graph batch sizes for improving performance. Future work would include testing more options like +16, and designing a way of automatically setting the batch sizes to reach the best balance of memory cost and performance gains.

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Summary by CodeRabbit

  • Refactor
    • Updated CUDA graph batch size generation with adjusted scheduling patterns for different padding configurations.

@yijingl-nvidia yijingl-nvidia requested a review from a team as a code owner April 9, 2026 16:52
@yijingl-nvidia yijingl-nvidia requested a review from syuoni April 9, 2026 16:52
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coderabbitai Bot commented Apr 9, 2026

📝 Walkthrough

Walkthrough

Modified the batch size generation logic in CudaGraphConfig._generate_cuda_graph_batch_sizes. When enable_padding is true, the function now generates batch sizes using [1, 2, 4] followed by multiples of 8 up to 128, then increments by 64 until reaching max_batch_size. When enable_padding is false, existing power-of-two extension logic is moved into an else block, preserving functional behavior.

Changes

Cohort / File(s) Summary
CUDA Graph Batch Size Generation
tensorrt_llm/llmapi/llm_args.py
Modified _generate_cuda_graph_batch_sizes method: when padding is enabled, uses new batch size strategy (8-step increments transitioning to 64-step increments); when disabled, consolidates power-of-two extension logic into else block while maintaining prior behavior.

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🎯 2 (Simple) | ⏱️ ~12 minutes

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Docstring Coverage ✅ Passed Docstring coverage is 100.00% which is sufficient. The required threshold is 80.00%.
Title check ✅ Passed The title accurately describes the main change: implementing +64 batch size increments for padding-enabled CUDA graphs, which is the core functional modification.
Description check ✅ Passed PR description comprehensively explains the change, rationale, experimental results, and trade-offs, exceeding template requirements.

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Caution

Some comments are outside the diff and can’t be posted inline due to platform limitations.

⚠️ Outside diff range comments (1)
tensorrt_llm/llmapi/llm_args.py (1)

169-187: ⚠️ Potential issue | 🟠 Major

Clamp padding-mode batch sizes to max_batch_size before returning.

On Line 181-Line 183, filtering/sorting now runs only in the else branch.
With enable_padding=True, batch_sizes can exceed max_batch_size (e.g., max_batch_size=64 still keeps values up to 128), which can lead to unnecessary graph capture and inconsistent config behavior.

🔧 Proposed fix
         if enable_padding:
             # Start with [1, 2, 4, 8, 16, 24, ..., 128] (multiples of 8)
             batch_sizes = [1, 2, 4] + [i * 8 for i in range(1, 17)]
             # Sliding 64: extend by increments of 64 up to max_batch_size
             while batch_sizes[-1] + 64 <= max_batch_size:
                 batch_sizes.append(batch_sizes[-1] + 64)
         else:
             batch_sizes = list(range(1, 32)) + [32, 64, 128]
             # Add powers of 2 up to max_batch_size
             batch_sizes += [
                 2**i for i in range(8, math.ceil(math.log(max_batch_size, 2)))
             ]
-            # Filter and sort batch sizes
-            batch_sizes = sorted(
-                [size for size in batch_sizes if size <= max_batch_size])
+        # Filter and sort batch sizes for both branches
+        batch_sizes = sorted(size for size in batch_sizes if size <= max_batch_size)
 
         # Add max_batch_size if not already included
-        if max_batch_size != batch_sizes[-1]:
+        if not batch_sizes or max_batch_size != batch_sizes[-1]:
             batch_sizes.append(max_batch_size)
🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed.

In `@tensorrt_llm/llmapi/llm_args.py` around lines 169 - 187, The enable_padding
branch for building batch_sizes can produce values > max_batch_size; update the
block that builds batch_sizes when enable_padding is True (the batch_sizes list
creation) to clamp/filter values to <= max_batch_size and sort/unique them just
like the else branch does, ensuring batch_sizes = sorted([s for s in batch_sizes
if s <= max_batch_size]) before the final check that appends max_batch_size if
missing; keep the subsequent append-of-max_batch_size logic unchanged.
🧹 Nitpick comments (1)
tensorrt_llm/llmapi/llm_args.py (1)

169-189: Add regression coverage for padding schedule edge cases.

Please add tests for enable_padding=True with at least: max_batch_size=64, 129, and 320 to assert all values are <= max_batch_size, sorted, and include max_batch_size. This will prevent regressions from branch-local filtering changes.

🤖 Prompt for AI Agents
Verify each finding against the current code and only fix it if needed.

In `@tensorrt_llm/llmapi/llm_args.py` around lines 169 - 189, Add regression tests
covering the padding schedule branch where enable_padding=True by calling the
batch-size generator (the function that takes enable_padding and max_batch_size
and returns batch_sizes) with max_batch_size values 64, 129, and 320; for each
case assert that every returned value in batch_sizes is <= max_batch_size, that
batch_sizes is sorted (non-decreasing), and that max_batch_size is present in
the returned list; target the branch that builds batch_sizes using the
enable_padding path (referencing the enable_padding parameter, max_batch_size
variable, and the returned batch_sizes) so future changes to the padding
schedule are validated.
🤖 Prompt for all review comments with AI agents
Verify each finding against the current code and only fix it if needed.

Outside diff comments:
In `@tensorrt_llm/llmapi/llm_args.py`:
- Around line 169-187: The enable_padding branch for building batch_sizes can
produce values > max_batch_size; update the block that builds batch_sizes when
enable_padding is True (the batch_sizes list creation) to clamp/filter values to
<= max_batch_size and sort/unique them just like the else branch does, ensuring
batch_sizes = sorted([s for s in batch_sizes if s <= max_batch_size]) before the
final check that appends max_batch_size if missing; keep the subsequent
append-of-max_batch_size logic unchanged.

---

Nitpick comments:
In `@tensorrt_llm/llmapi/llm_args.py`:
- Around line 169-189: Add regression tests covering the padding schedule branch
where enable_padding=True by calling the batch-size generator (the function that
takes enable_padding and max_batch_size and returns batch_sizes) with
max_batch_size values 64, 129, and 320; for each case assert that every returned
value in batch_sizes is <= max_batch_size, that batch_sizes is sorted
(non-decreasing), and that max_batch_size is present in the returned list;
target the branch that builds batch_sizes using the enable_padding path
(referencing the enable_padding parameter, max_batch_size variable, and the
returned batch_sizes) so future changes to the padding schedule are validated.

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  • tensorrt_llm/llmapi/llm_args.py

@yijingl-nvidia yijingl-nvidia changed the title [None][perf] Use sliding-64 batch sizes for padding-enabled CUDA graphs [None][perf] Use +64 batch sizes for padding-enabled CUDA graphs Apr 9, 2026
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kaiyux commented Apr 10, 2026

@yijingl-nvidia can you put a summary on the performance validation results on the PR description? Thanks.

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@yijingl-nvidia can you put a summary on the performance validation results on the PR description? Thanks.

Thanks for the suggestion. Edited the summary to include a brief summary of our performance findings.

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@yijingl-nvidia yijingl-nvidia force-pushed the default_cuda_graph_batch_sizes branch from a557b8b to f77a4d2 Compare April 20, 2026 17:57
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@yijingl-nvidia yijingl-nvidia force-pushed the default_cuda_graph_batch_sizes branch from f77a4d2 to e4fa2e3 Compare April 21, 2026 17:43
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When enable_padding=True, replace the sparse powers-of-2 schedule
(256, 512, 1024, 2048) with uniform +64 increments after the initial
[1,2,4,8,...,128] base, giving denser coverage (192, 256, 320, …,
max_batch_size) and reducing padding waste at intermediate batch sizes.

Signed-off-by: Yijing Li <[email protected]>
Move filter/sort outside the if/else so sizes exceeding max_batch_size
are dropped in the enable_padding=True branch as well. Add guard for
empty list before the max_batch_size append. Add regression tests for
edge cases: max_batch_size=64, 129, 320.

Signed-off-by: Yijing Li <[email protected]>
@yijingl-nvidia yijingl-nvidia force-pushed the default_cuda_graph_batch_sizes branch from e4fa2e3 to 6be963b Compare April 21, 2026 23:57
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Corresponding blog post at #13393

@taylor-yb-lee taylor-yb-lee merged commit 7e5275f into NVIDIA:main Apr 24, 2026
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yufeiwu-nv pushed a commit to yufeiwu-nv/TensorRT-LLM that referenced this pull request May 19, 2026
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